17 Jun

Physical Design Specialist Jobs Vacancy in Qualcomm Bengaluru

Position
Physical Design Specialist
Company
Qualcomm
Location
Bengaluru KA
Opening
17 Jun, 2018 30+ days ago

Qualcomm Bengaluru urgently required following position for Physical Design Specialist. Please read this job advertisement carefully before apply. There are some qualifications, experience and skills requirement that the employers require. Does your career history fit these requirements? Ensure you understand the role you are applying for and that it is suited to your skills and qualifications.

Follow the online directions, complete all the necessary fields, and provide all relevant information so your application is submitted correctly. When you click the 'Apply this Job' button (open in new window) you will be taken to the online application form. Here you will be asked to provide personal and contact details, respond to employment-related questions, and show how you meet the key selection criteria.

Physical Design Specialist Jobs Vacancy in Qualcomm Bengaluru Jobs Details:

Location

India - Bangalore

Job Overview

The responsibility includes:- Independent planning and execution of Netlist-to-GDSII. Full exposure to all aspects of design flows like floorplanning, placement, CTS, routing, crosstalk avoidance, physical verification Well versed with the level timing closure (STA), timing closure methodologies, ECO generation and predictable convergence. Well versed with parasitic extraction, LVS/DRC and other Physical verification checks. Should be able to provide clear directions to the team wrt PNR issues Drive methodology with help of local and external CAD/EDA teams for faster design convergence Well aware of place and route methodologies and hands on experience with timing convergence

Minimum Qualifications

2-15 yrs experience in Physical Design Execution
Should have good exposure to high frequency design convergence and descent exposure to physical design methodology
Masters/Bachelors Degree in Electrical/Electronics science engineering with at least 5+ years of experience in IC design Experience in leading block level or chip level Timing closure & Physical Design activities.
Work independently in the areas of RTL to GDSII implementation Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.) Circuit level comprehension of time critical paths in the design Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.)
Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers.
Strong problem-solving skills

Preferred Qualifications

Masters, Electrical Engineering


Education Requirements

Required: Bachelor's, Electrical Engineering
  • LI-IND


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